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march 2010 doc id 17229 rev 1 1/14 AN3171 application note comparing the m24c64-r, m24c64-f and m24c64-w devices to the m24lr64-r dual interface eeprom introduction the purpose of this application note is to explain the differences between the m24lr64-r dual interface eeprom when co ntrolled from the i2c bus, and the standard m24c64-f, m24c64-r, m24c64-w eeproms. for simplification purposes, the m24c64-f, m24c64-r, m24c64-w will be referred to as m24c64 in the rest of the document. for additional information, please refer to the m24lr64-r and m24c64 datasheets. www.st.com
contents AN3171 2/14 doc id 17229 rev 1 contents 1 hardware considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.1 pinout comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.2 two ways of accessing the m24lr64-r: rf and i2c . . . . . . . . . . . . . . . . . 6 2 software considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 m24lr64-r memory organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.1 user memory seen from the i2c bus (e2=0) . . . . . . . . . . . . . . . . . . . . . . . 8 3.1.1 sectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.1.2 page write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.1.3 read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.1.4 i2c present password . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.1.5 i2c write password . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.2 system memory seen from the i2c bus (e2=1) . . . . . . . . . . . . . . . . . . . . 10 3.2.1 m24lr64-r?s rf block security status . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.2.2 i2c_write_lock bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.2.3 system parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
AN3171 list of tables doc id 17229 rev 1 3/14 list of tables table 1. m24lr64-r device select code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 2. m24c64 device select code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 3. rf block security status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 4. i2c_write_lock bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 5. system parameter sector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 6. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
list of figures AN3171 4/14 doc id 17229 rev 1 list of figures figure 1. m24lr64-r and m24c64 logic diagrams. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. m24lr64-r and m24c64 pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 3. m24lr64-r block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 4. m24lr64-r?s user and system memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 5. i 2 c present password command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 6. i 2 c write password command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
AN3171 hardware considerations doc id 17229 rev 1 5/14 1 hardware considerations 1.1 pinout comparison figure 1 and figure 2 show the logic diagrams and the pinouts of the m24lr64-r and m24c64 devices, respectively. figure 1. m24lr64-r and m24c64 logic diagrams m24lr64-r ac0/ac1 pins: due to its rf capability, the m24lr 64-r dual interface eeprom features two inputs (ac0 and ac1) to connect the rf antenna. consequently, two inputs present in the m24c64 are not offered in the m24lr64-r: these are e2 and write control (wc ). practically, this means that you will be able to use up to four m24lr64- r devices (defined by e0, e1) on the same i2c bus, compared to eight devices (defined by e0, e1, e2) for the m24c64. the write control input (wc ) is used to write-protect the m24c64. the m24lr64-r can also be protected but in a different way, using the i2c_write_lock bits. figure 2. m24lr64-r and m24c64 pinouts figure 2 shows that the four mandatory pins for the i2c bus (v ss , v cc , scl, sda) are positioned likewise in the two devices. ac0 and ac1 are connected to pin 2 and pin 3, respectively. they have to be next to each other for rf capab ility requirements. as a result, e1 wa s moved to pin 7 in the m24lr64-r, whereas it is connected to pin 2 in the m24c64. !) % % 3$! 6 ## -,2 2 3#, 6 33 !# !# % % 3$! 6 ## -# 7# 3#, 6 33 3$! 6 33 3#, 7# % % 6 ## % ai 3$! 6 33 3#, % !# % 6 ## !# -,2 2 -#
hardware considerations AN3171 6/14 doc id 17229 rev 1 1.2 two ways of accessing the m24lr64-r: rf and i2c compared to the m24c64, the m24lr64-r has an additional ca pability: rf access, made possible by connecting the ac0 & ac1 pins to a tuned antenna. this modifies the block diagram of the m24lr64-r. figure 3 shows the new block diagram. figure 3. m24lr64-r block diagram one difference between the m24lr64-r and the m24c64 is that the m24c64 can be accessed only through the i2c bus, whereas the m24lr64-r can be accessed through either the i2c bus or the rf interface. due to the m24lr64-r?s dual a ccess capability, a number of th ings have to be taken into account when accessing the device. if an rf request is made while an i2c communication is ongoing, it will not be served . likewise, if an i2c req uest is made during an rf communication, it will not be served. this has to be taken into account in the system. a dedicated application note, an3057, explains ?how to manage simultaneously i2c and rf data transfers with the m24lr64-r?. %%02/- 2owdecoder ,atch ,ogic 2& ) # 2&6 ## #ontact6 ## 3#, 3$! 6 33 6 ## !# !# 0owermanagement ai page bytes
AN3171 software considerations doc id 17229 rev 1 7/14 2 software considerations ta bl e 1 and ta bl e 2 show the device select codes of the m24lr64-r and m24c64, respectively. as explained earlier, the m24lr64-r does not offer the e2 pin. in the m24lr64-r?s device sele ct code, bit 3 is used to defi ne access to eeprom user data or system data: e2=0: user memory e2=1: system memory except for bit 3, the device select code is used in the same way for the two devices. table 1. m24lr64-r device select code device type identifier (1) 1. the most significant bit, b7, is sent first. chip enable address (2) 2. e0 and e1 are compared to the respecti ve external pins on the memory device. rw b7 b6 b5 b4 b3 b2 b1 b0 device select code 1010e2 (3) 3. e2 is not connected to any external pin. it is however used to address the m24lr64-r. e1 e0 rw table 2. m24c64 device select code device type identifier (1) 1. the most significant bit, b7, is sent first. chip enable address (2) 2. e0, e1 and e2 are compared to the respec tive external pins on the memory device. rw b7 b6 b5 b4 b3 b2 b1 b0 device select code 1010e2e1e0rw
m24lr64-r memory organization AN3171 8/14 doc id 17229 rev 1 3 m24lr64-r memory organization figure 4 shows the memory organization of the m24lr64-r. figure 4. m24lr64-r?s user and system memories 3.1 user memory seen from the i2c bus (e2=0) the m24lr64-r?s user memory is a 64 kbit eeprom similar to the m 24c64. to access the m24lr64-r?s user memory area, e2 has to be reset to 0 in the device select byte. 3.1.1 sectors the m24lr64-r?s user memory is organized as 32 sectors of 128 bytes each. the device has a feature specially added to write-protect sectors: each sector can be write-locked separately by setting the corresponding i2c_write_lock bit . when a sector is write-locked, the i2c password (see section 3.1.4: i2c present password ) has to be presented before the sector can be written. 3.1.2 page write the page size of the m24lr64-r is 4 bytes, making it possible to write up to 4 bytes in a single write cycle. with page write you can write up to 32 bytes to an m24c64 device in a single write cycle. +bit%%02/-sector bit +bit%%02/-sector bit +bit%%02/-sector bit +bit%%02/-sector bit +bit%%02/-sector bit +bit%%02/-sector bit +bit%%02/-sector bit +bit%%02/-sector bit 2&blocksecurity )#?7rite,ockbit )#0assword 2&0assword 2&0assword 2&0assword bit$3&)$ bit!&) bit5)$ 3ector !rea )#?7rite?,ock ai 5sermemory % 3ystemmemory %
AN3171 m24lr64-r memory organization doc id 17229 rev 1 9/14 3.1.3 read the m24c64 and m24lr64-r are read identically (from the i2c bus). 3.1.4 i2c present password it is a command specific to the m24lr64-r. figure 5 shows the command sequence. to write data to a locked sector or the system memory, the system has to present the correct password. this is done using the i2c present password command. with this command, you can: in user memory (see figure 4: m24lr64-r?s user and system memories ): ? write data to the write-protected sector(s) in system memory (see figure 4: m24lr64-r?s user and system memories ): ? modify each i2c_write_lock bit ? modify each rf block security bit ? read the i2c password the password is 32 bits long. figure 5. i 2 c present password command 3.1.5 i2c write password this command also is specific to the m24lr64-r. figure 6 shows the command sequence. the i2c write password command is used to change the i2c password. it has to be preceded by a correct i2c present password sequence, otherwise it is not executed. ai15125b start device select code password address 09h password address 00h password [31:24] ack r/w ack ack ack device select code = 1010 1 e1 e0 password [23:16] password [15:8] password [7:0] ack ack ack ack generated during 9 th bit time slot. stop validation code 09h ack password [31:24] ack password [23:16] password [15:8] password [7:0] ack ack ack
m24lr64-r memory organization AN3171 10/14 doc id 17229 rev 1 figure 6. i 2 c write password command 3.2 system memory seen from the i2c bus (e2=1) the m24lr64-r device offers an additional eeprom memo ry area named the system memory (see figure 4: m24lr64-r?s user and system memories ). the system memory can only be accessed in read or/and write mode through the i2c bus by setting the e2 bit to 1 in the device select byte. 3.2.1 m24lr64-r?s rf block security status the 64 bytes in the system memory store the rf block security status value of each rf sector (1 byte for 1 sector). this rf block security status can be read from the i2c bus in order to verify the protection of the user memory, when accessed from the rf channel. the data in the rf block security status can be erased or modified from the i2c bus only if the i2c password has been presented successfully. ai15126 start device select code password address 09h password address 00h new password [31:24] ack r/w ack ack ack device select code = 1010 1 e1 e0 new password [23:16] new password [15:8] new password [7:0] ack ack ack ack generated during 9 th bit time slot. stop validation code 07h ack new password [31:24] ack new password [23:16] new password [15:8] new password [7:0] ack ack ack table 3. rf block security status i 2 c byte address bits [31:24] bits [23:16] bits [15:8] bits [7:0] e2 = 1 0 sss 3 sss 2 sss 1 sss 0 e2 = 1 4 sss 7 sss 6 sss 5 sss 4 e2 = 1 8 sss 11 sss 10 sss 9 sss 8 e2 = 1 12 sss 15 sss 14 sss 13 sss 12 e2 = 1 16 sss 19 sss 18 sss 17 sss 16 e2 = 1 20 sss 23 sss 22 sss 21 sss 20 e2 = 1 24 sss 27 sss 26 sss 25 sss 24 e2 = 1 28 sss 31 sss 30 sss 29 sss 28 e2 = 1 32 sss 35 sss 34 sss 33 sss 32 e2 = 1 36 sss 39 sss 38 sss 37 sss 36 e2 = 1 40 sss 43 sss 42 sss 41 sss 40
AN3171 m24lr64-r memory organization doc id 17229 rev 1 11/14 3.2.2 i2c_write_lock bits eight bytes in the system memory area define the i2c_write_lock bit value of each sector in user memory (1 bit for 1 sector). the i2c_write_lock bits can be read through the i2c bus to verify the protection of the user memory in rf mode. the c_write_lock bits can be modified through the i2c bus only if the i2c password has been successfully presented. 3.2.3 system parameters the system parameters (in the system memory) are: i2c password three rf passwords dsfid afi two rfu bytes eight uid bytes three mem_size bytes ic ref these parameters are read-only. ta bl e 5 shows there location in the system memory. e2 = 1 44 sss 47 sss 46 sss 45 sss 44 e2 = 1 48 sss 51 sss 50 sss 49 sss 48 e2 = 1 52 sss 55 sss 54 sss 53 sss 52 e2 = 1 56 sss 59 sss 58 sss 51 sss 56 e2 = 1 60 sss 63 sss 62 sss 61 sss 60 table 3. rf block security status (continued) i 2 c byte address bits [31:24] bits [23:16] bits [15:8] bits [7:0] table 4. i2c_write_lock bits i 2 c byte address bits [31:24] bits [23:16] bits [15:8] bits [7:0] e2 = 1 2048 sectors 31-24 sectors 23-16 sectors 15-8 sectors 7-0 e2 = 1 2052 sectors 63-56 sectors 55-48 sectors 47-40 sectors 39-32
m24lr64-r memory organization AN3171 12/14 doc id 17229 rev 1 the rf passwords cannot be read (an i2c read operation to an rf password area sends back ffh data) or written through the i2c bus. the i2c password can be read only if an i2c present password sequence was previously performed and the password matched. it is not possible to directly write the i2c password: to be able to modify the i2c password, the i2c write password command has to be used. dsfid, afi, rfu, uid, memsize and i2c ref are read-only data and cannot be modified from the i2c bus. table 5. system parameter sector rf address i 2 c byte address bits [31:24] bits [23:16] bits [15:8] bits [7:0] -e2 = 12304 i 2 c password (default 0000 0000h) 1 e2 = 1 2308 rf password 1 (default 0000 0000h) 2 e2 = 1 2312 rf password 2 (default 0000 0000h) 3 e2 = 1 2316 rf password 3 (default 0000 0000h) - e2 = 1 2320 dsfid (ffh) afi (00h) rfu (ffh) rfu (ffh) - e2 = 1 2324 uid uid uid uid - e2 = 1 2328 uid (e0h) uid (02h) uid uid - e2 = 1 2332 mem_size (03 07ffh) ic ref (2ch)
AN3171 revision history doc id 17229 rev 1 13/14 4 revision history table 6. document revision history date revision changes 08-mar-2010 1 initial release.
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